1. Field
The present disclosure relates generally to computing device storage, and more specifically to non-volatile storage devices.
2. Background
Dynamic clock-voltage scaling (DCVS) schemes can be used to reduce power consumption by reducing clock frequency and/or voltages. So far, DCVS has typically only been applied to memory and processor subsystems. Yet, storage devices (e.g., peripheral and internal storage drives) and their input-output (I/O) subsystems also have significant impact on device power consumption. Current research has looked at power reduction schemes for disk-based storage—schemes which are not applicable to non-volatile storage devices (e.g., embedded Multi-Media cards (eMMC), Secure Digital (SD), and other Solid-State Devices (SSD)), which are common in embedded systems like handheld devices including smartphones, tablets, and ultrabooks, to name a few. At the same time, clock frequency of these I/O subsystems is on the rise, and with these increased frequencies comes even greater power consumption. There is thus a need in the art to reduce power consumption in I/O subsystems.